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i960® Processors-Application Notes = document is not available on-line, select title to order document in hardcopy. Select this link to return to order form. Commercial CX AB-42--80960 Self-Test AP-506: Designing for 80960CX and 80960HX Compatibility AP-703: DRAM Controller for 33 MHz i960® CA/CF Microprocessors AP-704: A Simple DRAM Controller for 25/16 MHz i960® CA/CF Microprocessors AP-706: DRAM Controller for 40 MHz i960® CA/CF Microprocessors AP-716 80960CX/80960JX/80960HX Architectural Comparison AP-733 Switched Ethernet Reference Design Description Consideration For Building Target Hardware For Use With MON960 How ic960 R3.5 Handles 80960CA Branch Prediction Fot If-Then Conditionals Unexpected Float to Double Promotion in iC960 R3.0 and R3.5 Using the iC960's R3.0/R3.5 Compiler's and Linker's Verbose Warning Switches as Debug Aids Using the MON960 System Calls, appl_exit_user and appl_go_user HX 80960HX Processor Initialization: IBR Fetching / Internal Initialization Sequence AB-42--80960 Self-Test AP-506: Designing for 80960CX and 80960HX Compatibility AP-716 80960CX/80960JX/80960HX Architectural Comparison AP-733 Switched Ethernet Reference Design Description Consideration For Building Target Hardware For Use With MON960 How ic960 R3.5 Handles 80960CA Branch Prediction Fot If-Then Conditionals Unexpected Float to Double Promotion in iC960 R3.0 and R3.5 Using the iC960's R3.0/R3.5 Compiler's and Linker's Verbose Warning Switches as Debug Aids Using the MON960 System Calls, appl_exit_user and appl_go_user JX AB-42--80960 Self-Test AP-712: DRAM Controller for i960® JA/JF/JD Microprocessors AP-716 80960CX/80960JX/80960HX Architectural Comparison AP-733 Switched Ethernet Reference Design Description Consideration For Building Target Hardware For Use With MON960 How ic960 R3.5 Handles 80960CA Branch Prediction Fot If-Then Conditionals Interfacing the i960® JX Microprocessor to the NEC uPD98401 * Local ATM Segmentation and Reassembly (SAR) Chip Unexpected Float to Double Promotion in iC960 R3.0 and R3.5 Using the iC960's R3.0/R3.5 Compiler's and Linker's Verbose Warning Switches as Debug Aids Using the MON960 System Calls, appl_exit_user and appl_go_user 5 V 80960 JA/JF/JD Processor Conversion to 3.3 V 80L960JA/JF Processor Conversion to 80960Jx 3.3 V, 5 V Tolerant Processor KX AB-42--80960 Self-Test AP-733 Switched Ethernet Reference Design Description Consideration For Building Target Hardware For Use With MON960 How ic960 R3.5 Handles 80960CA Branch Prediction Fot If-Then Conditionals Unexpected Float to Double Promotion in iC960 R3.0 and R3.5 Using the iC960's R3.0/R3.5 Compiler's and Linker's Verbose Warning Switches as Debug Aids Using the MON960 System Calls, appl_exit_user and appl_go_user RP/RD AB-42--80960 Self-Test AP-649 Developing Software Routines for the i960(R) RP/RD I/O Processor's I2C Bus Interface Unit AP-733 Switched Ethernet Reference Design Description AP-756 Developing an Expansion ROM for the i960® RP/RD I/O Processor Consideration For Building Target Hardware For Use With MON960 How ic960 R3.5 Handles 80960CA Branch Prediction Fot If-Then Conditionals Unexpected Float to Double Promotion in iC960 R3.0 and R3.5 Using the iC960's R3.0/R3.5 Compiler's and Linker's Verbose Warning Switches as Debug Aids Using the MON960 System Calls, appl_exit_user and appl_go_user SX AB-42--80960 Self-Test AP-733 Switched Ethernet Reference Design Description Consideration For Building Target Hardware For Use With MON960 How ic960 R3.5 Handles 80960CA Branch Prediction Fot If-Then Conditionals Unexpected Float to Double Promotion in iC960 R3.0 and R3.5 Using the iC960's R3.0/R3.5 Compiler's and Linker's Verbose Warning Switches as Debug Aids Using the MON960 System Calls, appl_exit_user and appl_go_user * Legal Information © 1998 Intel Corporation